[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vqadd.s64 q0,q1,q2'
[^:]*:11: Error: bad type in SIMD instruction -- `vqsub.u64 q0,q1,q2'
[^:]*:12: Error: bad type in SIMD instruction -- `vqadd.s64 q0,q1,r2'
[^:]*:13: Error: bad type in SIMD instruction -- `vqsub.s64 q0,q1,r2'
[^:]*:14: Error: bad type in SIMD instruction -- `vqadd.f32 q0,q1,q2'
[^:]*:15: Error: bad type in SIMD instruction -- `vqsub.f32 q0,q1,q2'
[^:]*:16: Error: bad type in SIMD instruction -- `vqadd.f32 q0,q1,r2'
[^:]*:17: Error: bad type in SIMD instruction -- `vqsub.f32 q0,q1,r2'
[^:]*:18: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:19: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:20: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:21: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: *Info: macro .*
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: *Info: macro .*
[^:]*:27: Error: syntax error -- `vqaddeq.s32 q0,q1,q2'
[^:]*:28: Error: syntax error -- `vqaddeq.s32 q0,q1,q2'
[^:]*:30: Error: syntax error -- `vqaddeq.s32 q0,q1,q2'
[^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vqaddt.s32 q0,q1,q2'
[^:]*:33: Error: instruction missing MVE vector predication code -- `vqadd.s32 q0,q1,q2'
[^:]*:35: Error: syntax error -- `vqsubeq.s32 q0,q1,q2'
[^:]*:36: Error: syntax error -- `vqsubeq.s32 q0,q1,q2'
[^:]*:38: Error: syntax error -- `vqsubeq.s32 q0,q1,q2'
[^:]*:39: Error: vector predicated instruction should be in VPT/VPST block -- `vqsubt.s32 q0,q1,q2'
[^:]*:41: Error: instruction missing MVE vector predication code -- `vqsub.s32 q0,q1,q2'
[^:]*:43: Error: syntax error -- `vqaddeq.s32 q0,q1,r2'
[^:]*:44: Error: syntax error -- `vqaddeq.s32 q0,q1,r2'
[^:]*:46: Error: syntax error -- `vqaddeq.s32 q0,q1,r2'
[^:]*:47: Error: vector predicated instruction should be in VPT/VPST block -- `vqaddt.s32 q0,q1,r2'
[^:]*:49: Error: instruction missing MVE vector predication code -- `vqadd.s32 q0,q1,r2'
[^:]*:51: Error: syntax error -- `vqsubeq.s32 q0,q1,r2'
[^:]*:52: Error: syntax error -- `vqsubeq.s32 q0,q1,r2'
[^:]*:54: Error: syntax error -- `vqsubeq.s32 q0,q1,r2'
[^:]*:55: Error: vector predicated instruction should be in VPT/VPST block -- `vqsubt.s32 q0,q1,r2'
[^:]*:57: Error: instruction missing MVE vector predication code -- `vqsub.s32 q0,q1,r2'
